arXiv：cs.AI· Haotian Qiao, Robert P. Dick·· 11 小时前
LLM 驱动的硬件数据手册自动构建分层硬件知识图谱框架
Faithful and Complete LLM-Assisted Automated Construction of Hierarchical Hardware Knowledge Graphs
AI 导读
研究者提出一套 LLM 驱动的自动化流水线，通过基于分块的属性提取、分层路由和迭代精炼，将硬件数据手册转换为通用的分层硬件知识图谱。在 20 份不同组件类型和长度的数据手册上，该框架属性忠实度达 98.8%，而一次性处理基线仅为 76.1%，且完整覆盖了基线 83.6% 的忠实属性，反向则仅 10.5%。
正文
Abstract:Hardware datasheets contain engineering specifications essential for component selection, system integration, and hardware compatibility verification. However, manual inspection is tedious and error-prone because datasheets are lengthy and heterogeneous, with dense information fragmented across tables, figures, and text. Although large language models (LLMs) can automate this process, naïve one-shot processing omits relevant specifications even when the document fits within the model's context window.
We present an automated LLM-driven pipeline that transforms hardware datasheets into general-purpose hierarchical hardware knowledge graphs through chunk-based property extraction, hierarchical routing, and iterative refinement. The framework uses LLMs for information extraction and semantic reasoning while preserving source provenance and applying graph updates through validated instructions and deterministic local execution. This staged design reduces per-query context and maintains traceable intermediate representations. The resulting knowledge graphs provide semantically organized, source-grounded hardware properties for downstream retrieval and reasoning.
We evaluate the framework on 20 hardware datasheets spanning diverse component types and document lengths. We assess property faithfulness and introduce inter-graph completeness to measure relative semantic coverage without exhaustive ground truth. Our framework achieves 98.8% property faithfulness compared with 76.1% for the one-shot baseline, while fully covering 83.6% of faithful baseline properties; in the reverse direction, the baseline fully covers only 10.5% of ours. These improvements provide more reliable and comprehensive engineering information for downstream hardware design and verification, reducing the risk of overlooked constraints and incorrect decisions.
| Subjects: | Artificial Intelligence (cs.AI) |
| Cite as: | arXiv:2610.12762 [cs.AI] |
| (or arXiv:2610.12762v1 [cs.AI] for this version) | |
| https://doi.org/10.48550/arXiv.2610.12762 arXiv-issued DOI via DataCite (pending registration) |
Submission history
From: Haotian Qiao [view email]
[v1]
Thu, 8 Oct 2026 22:12:37 UTC (2,258 KB)
来源：arXiv：cs.AI · arxiv.org