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arXiv:cs.AI· Aniseh Dorostkar, Hamed Farbeh, Hamid R. Zarandi·· 6 小时前AI 评分39

ReRAM 存内计算 CNN 加速器的故障脆弱性实证研究

An Empirical Fault Vulnerability Exploration of ReRAM-based Process-in-Memory CNN Accelerators

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研究者开发了一套故障注入框架,在软件与硬件推理层面考察大规模 CNN 在 ReRAM 存内计算加速器上的脆弱性,通过将 CNN 学习参数映射到 ReRAM 交叉阵列并注入 stuck-at high(SaH)与 stuck-at low(SaL)故障,发现脆弱性受层类型与深度、参数位置以及故障值与类型影响,且 SaL 对分类精度的削弱比 SaH 更严重。

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Abstract:Resistive random-access memory (ReRAM)-based Processing-in-Memory (PIM) accelerator is a promising platform for processing massively memory intensive matrix-vector multiplications of neural networks in parallel domain, due to its capability of analog computation, ultra-high density, near-zero leakage current, and non-volatility. Despite many advantages, ReRAM-based accelerators are highly error-prone due to limitations of technology fabrication that lead to process variations and defects. These limitations degrade the accuracy of Deep Convolutional Neural Networks (Deep CNNs) running on PIM accelerators. While these CNNs accelerators are widely deployed in safety-critical systems, their vulnerability to fault is not well explored. In this paper, we have developed a fault injection framework to investigate the vulnerability of large-scale CNNs at both software- and hardware-level of inference phases. Faulty ReRAM devices are another reliability challenges due to significant degradation of classification accuracy when CNN parameters are mapped to the accelerators. To investigate this challenge, we map the CNN learning parameter to the ReRAM crossbar and inject faults into crossbar arrays. The proposed framework analyzes the impact of stuck-at high (SaH) and stuck-at low (SaL) fault models on different layers and locations of CNN learning parameters. By performing extensive fault injections, we illustrate that the vulnerability behavior of ReRAM-based PIM accelerator for CNNs is greatly impressible to the types and depth of layers, the location of the learning parameter in every layer, and the value and types of faults. Our observations show that different models have different vulnerabilities to faults. Specifically, we show that SaL further reduces classification accuracy than SaH.
Subjects: Hardware Architecture (cs.AR); Artificial Intelligence (cs.AI)
Cite as: arXiv:2610.07029 [cs.AR]
  (or arXiv:2610.07029v1 [cs.AR] for this version)
  https://doi.org/10.48550/arXiv.2610.07029

arXiv-issued DOI via DataCite (pending registration)

Journal reference: A. Dorostkar, H. Farbeh and H. R. Zarandi, "An Empirical Fault Vulnerability Exploration of ReRAM-Based Process-in-Memory CNN Accelerators," in IEEE Transactions on Reliability, vol. 74, no. 1, pp. 2290-2304, March 2025
Related DOI: https://doi.org/10.1109/TR.2024.3405825

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Submission history

From: Aniseh Dorostkar [view email]
[v1] Sun, 4 Oct 2026 18:21:59 UTC (1,362 KB)

来源:arXiv:cs.AI · arxiv.org