郭明錤｜Ming-Chi Kuo

A few quick thoughts on what TSMC said about CoPoS during its Q2 2026 earnings call (screenshot from the transcript). The devil is in the details: 1. The phrase "alternative to try to lower down the cost" refers to the glass carrier. That's the CoP part. 2. "Work with substrate vendor" refers to the glass core substrate (GCS). That's the oS part. 3. Pay close attention to this phrase: "takes about another 1 year to be mature." It refers to the pilot line mentioned earlier. For a new technology, a mature pilot line and a mature mass-production line are two completely different things. 4. When TSMC says the pilot line will mature in about a year, this fully validates my earlier prediction that "the 510x515mm format will be used for pre-mass-production simulation in 2H27." For oS/GCS, "mature" means being able to start simulating with the final 510x515mm glass format on the pilot line, instead of the current 250x250mm. 5. Following from point 4, most companies currently involved in the oS/GCS supply chain may not be among the suppliers ultimately selected for mass production (not to mention companies that are only part of the market narrative and have no actual involvement). This is important to keep in mind when looking for investment opportunities at this stage, especially among equipment and materials suppliers. 6. TSMC's answer was brief, but it covered both CoP and oS. It did not mention a glass interposer at all, consistent with my earlier point that CoPoS does not use one. 7. Compared with what TSMC shared at its Japan symposium in June, the only new information in the Q2 2026 earnings call was that the pilot line is expected to reach maturity in 2H27. That said, I think the market was probably already expecting something close to this timeline. Now that TSMC has mentioned it, Ibiden and Innolux may also discuss the same timeline in their upcoming earnings calls.

市場近期傳聞，台積電因 DRAM 供應緊張，囤積約 10 億美元的 Apple 2nm 處理器半成品（傳聞稱為處理器晶圓）無法封裝，並以台積電 2Q26 法說提到「庫存天數增加主因是 2nm 量產爬坡」作為佐證。 我的產業調查顯示，Apple 今年的硬體出貨量確實因記憶體短缺而下調，但 Apple 在台積電的處理器訂單，會在至少約 3 個月前依可取得的記憶體數量規劃生產，而不是讓台積電提前大量生產半成品。 這不代表台積電不會提前生產並囤積半成品；但若瓶頸不在台積電，這麼做並無實益，因此，Apple 也沒有太大理由額外付錢要求台積電這樣做。 換言之，記憶體供應緊張是真，但我的理解是，並沒有出現「台積電先囤積 10 億美元半成品，再苦等記憶體到貨封裝」這種戲劇性變化。台積電與 Apple 都是全球執行力頂尖的企業，在供應鏈管理上，雙方緊密合作下也很難出現這種戲劇性的發展。 最後，憑公開資訊也能反思市場傳聞可能性。台積電在 2Q26 法說表示，庫存天數增加主要因 2nm 量產爬坡，但這裡的庫存不能直接視為由 Apple 處理器半成品造成，原因有三： 1. 台積電過往全新先進製程量產爬坡時，庫存天數通常也會增加，並非今年特有現象。 2. 台積電的庫存除半成品外，也包括製成品、原材料、物料與備品。 3. 今年 2nm 客戶不只有 Apple，還包括其他 IC 設計客戶（如 AMD 與聯發科）。

A recent media report claims that tight DRAM supply has left TSMC holding around US$1 billion worth of Apple 2nm processor work-in-process (WIP), described in the report as “processor wafers,” that cannot yet be packaged. As supporting evidence, it points to TSMC’s 2Q26 earnings call, where the company said the increase in inventory days was mainly due to the 2nm production ramp. My industry checks suggest that Apple has indeed scaled back its hardware shipment plans this year due to memory shortages. However, Apple plans its processor production at TSMC at least three months in advance, based on the amount of memory expected to be available, rather than having TSMC build large amounts of WIP ahead of time. This does not mean TSMC never builds WIP in advance and holds it in inventory. But if the bottleneck is not at TSMC, building ahead provides little benefit, so Apple would have little reason to pay TSMC extra for it. In other words, tight memory supply is real. But my understanding is that there has been no dramatic scenario in which TSMC first built up US$1 billion of WIP and then had to wait for memory to arrive before packaging could proceed. TSMC and Apple are both known for world-class execution, and such a dramatic development would be unusual given how closely the two companies coordinate their supply chains. Finally, public information alone offers a useful way to assess this claim. TSMC said on its 2Q26 earnings call that the increase in inventory days was mainly due to the 2nm production ramp. However, that inventory cannot be directly attributed to Apple processor WIP for three reasons: 1. TSMC's inventory days typically increase when a new advanced node enters its initial production ramp, so this is not unique to this year. 2. TSMC’s definition of inventory includes not only work-in-process, but also finished goods, raw materials, supplies, and spare parts. 3. Apple is not TSMC’s only 2nm customer this year. Other chip designers, including AMD and MediaTek, are also using 2nm.

My latest supply chain checks indicate that Nvidia has begun testing glass-free copper-clad laminate (CCL) based primarily on hydrocarbon (HC) resin as a replacement for glass-free PTFE-based CCL tested previously, paired with glass-free HC-based PP. The goal is to determine whether this material combination can meet the switch tray PCB requirements for Rubin Ultra NVL576, an eight-rack interconnected solution expected to enter mass production in 2H27. Preliminary tests conducted as part of efforts to improve PCB manufacturability show that glass-free HC CCL meets the switch tray’s high-frequency electrical requirements. Its electrical performance trails that of the original PTFE solution but exceeds that of M9-class solutions and even surpasses M10’s stated specifications. These results do not represent a final material selection, but they indicate that NVIDIA continues to seek higher PCB manufacturing yields and greater production efficiency while meeting electrical requirements. 1. Key Takeaways and Analysis (1) Previous NVL576 switch tray tests used glass-free PTFE CCL paired with glass-free HC PP. The latest round replaces the PTFE CCL with glass-free HC CCL while retaining the same HC PP part number. (2) Shengyi Technology is currently the leading supplier in the NVL576 switch tray material evaluations. The materials involved are SG5300N (glass-free PTFE CCL), SG1030N (glass-free HC CCL), and SIF09 (glass-free HC PP). (3) The primary objective of testing glass-free HC CCL as a replacement for glass-free PTFE CCL is to determine whether PCB manufacturing yields and production efficiency can be improved while still meeting high-frequency electrical requirements. (4) To further improve PCB manufacturability, subsequent tests may also evaluate replacing glass-free HC PP with woven-glass-reinforced HC PP. The challenge is whether the glass-reinforced material can still meet signal integrity and 0.4 dB/in loss requirements. (5) Notably, both SG1030N and SIF09 still contain small amount of PTFE, although HC is the primary material. These tests therefore do not represent a complete shift away from PTFE. Rather, they involve adjusting the primary resin system and material combination to balance high-frequency electrical performance with PCB manufacturability. 2. Conclusions (1) The long-term trend toward broader use of PTFE in advanced PCB materials, including CCL and PP, remains clear. However, the pace of shipment growth over the next two years remains uncertain. Key variables include NVL576 switch tray PCB’s final material selection, NVL576 adoption rate, and development progress on Kyber-like rack designs that use orthogonal backplanes. (2) HC use in advanced CCL and PP continues to expand. Beyond NVL576 switch trays, near-term growth drivers include the production ramp of M9-class materials beginning in 4Q26, followed by the adoption of M10-class materials. (3) Once specifications are finalized and mass production begins, it's expected that Shengyi Technology to accelerate sourcing from Chinese HC suppliers. These include existing suppliers such as Dongcai and Shengquan, as well as potential ones such as GCH Technology. This should help alleviate supply shortages and optimize its cost structure.

簡要評論台積電 Q2 2026 法說中關於 CoPoS 的部分（截圖自逐字稿），魔鬼都在細節中： 1. 「alternative to try to lower down the cost」指的就是 glass carrier（玻璃載具），也就是 CoP 的部分。 2. 「work with substrate vendor」指的就是 glass core substrate（GCS；玻璃核心載版），也就是 oS 的部分。 3. 「takes about another 1 year to be mature」這句話要非常注意，這是指延續上面提到的試產線。對新技術來說，試產線的成熟，跟量產線的成熟，是完全不同的兩回事。 4. 台積電提到試產線 1 年後成熟，完全驗證我先前提到「2H27 採用 510x515mm（玻璃尺寸）做量產前模擬」的預測。這裡的「成熟」，對 oS / GCS 來說，指的是能在試產線上，開始模擬使用 510x515mm 的最終玻璃規格，而非現在的 250x250mm。 5. 延續4，這意味著現在大部分參與 oS / GCS 的供應鏈，不一定是最終的供應商們（更別提只是純粹敘事、沒實質參與的供應商們）。這是現階段想找投資機會（特別是設備與材料商）時要注意的地方。 6. 台積電的回應很簡短，但已涵蓋了 CoP 與 oS。這之中完全沒有提到 glass interposer（玻璃中介層），也呼應了我先前提到 CoPoS 不使用 glass interposer 這件事。 7. 與台積電在 6 月份的日本研討會內容相比，Q2 2026 法說新增的資訊就是「2H27 試產線成熟」這件事。不過，我認為市場應該多少已經對這時程有預期。而既然台積電已經提了，接下來 Ibiden 與群創的法說，可能也會提及此時程。

In the fast-moving tech industry, can data from industry checks go six months without an update and still track a company’s guidance more closely than market consensus? That’s rare, but here’s one example where the research held up, with a little luck on my side. ASML's latest Q2 2026 results further validate several predictions I made six months ago (in January). The most important of them, and the easiest to verify with hard numbers, is the EUV shipment outlook. EUV is different from consumer electronics, where forecasts shift constantly. Strong AI demand and the difficulty of expanding upstream capacity mean that my EUV shipment estimates, based on capacity changes at the key supplier Carl Zeiss SMT, have stayed closer to the company's guidance than the market consensus over the past six months, even without any updates. ASML's 2026 / 2027 EUV shipments: 1. In January, I forecast 2026 / 2027 shipments of 67 / 80-85 units, and noted that 2027 EUV was already sold out. At the time, the market consensus for 2026 shipments was just 53-55 units. 2. In its Q1 2026 results in April, ASML gave shipment guidance of at least 60 / 80 units for 2026 / 2027. Notably, the first time the company offered guidance as far out as 2027, the number already fell within my January forecast range. 3. In its latest Q2 2026 results in July, ASML raised the 2026 / 2027 numbers to about 65 units (excluding High-NA) / about 85 units (implied by the company's guidance), and noted that nearly all the EUV orders it needs for 2027 are already in, bringing the outlook even closer to my January forecast of 67 units for 2026 and "sold out" for 2027. Worth noting: even though more bullish expectations of around 90 units or more for 2027 had surfaced ahead of the Q2 2026 results, the outlook the company ultimately provided (about 85 units) still landed at the upper end of my January forecast range.

MediaTek’s latest announcement on the deepening of its long-term partnership with Nvidia repeatedly uses the term “rack-scale.” This is the key to understanding the announcement, and it directly validates the central conclusion of my research from more than two months ago: MediaTek has upgraded the strategic positioning of its AI business from "IC / ASIC design" to "system-level design." The announcement link: https://www.mediatek.com/press-room/nvidia-and-mediatek-deepen-long-standing-partnership-to-build-ai-edge-to-cloud-computing-platforms The announcement also explains how MediaTek plans to put this new positioning into practice. By working with Nvidia, MediaTek can bring custom chips and XPUs into Nvidia’s mature rack-scale ecosystem, so that once chip development is complete, they can be integrated more quickly into rack-scale systems for deployment in data centers and AI factories. For MediaTek, Nvidia’s mature rack-scale systems ecosystem means it does not need to start from scratch, giving this new strategy a much clearer path to execution. For Nvidia, MediaTek’s custom silicon design capabilities and customer base can help extend Nvidia’s rack-scale ecosystem further into the custom silicon market. This also explains why “rack-scale” is the key term in the announcement: it is where the two companies need each other most. MediaTek can move from chips to systems, while Nvidia can extend its rack-scale ecosystem into the custom silicon market, creating a win-win that opens up new growth opportunities for both.

我最新的產業調查顯示，Nvidia 開始測試以碳氫樹脂（hydrocarbon resin，HC）為主的無布 CCL，取代先前測試的 PTFE 無布 CCL，並搭配 HC 無布 PP，評估能否滿足預計於 2H27 量產的 Rubin Ultra NVL576（8 機櫃互連方案）之 switch tray PCB 需求。 在提升 PCB 生產性的目標下，HC 無布 CCL 的初步測試結果符合 switch tray 的高頻電性要求（表現不及原 PTFE 方案，但優於 M9 等級方案，甚至優於 M10 的帳面規格）。上述測試不代表最終定案，但顯示 Nvidia 仍在滿足電性要求的前提下，尋求更好的 PCB 製造良率與生產效率。 1. 重點解讀與分析： (1) 先前測試 NVL576 switch tray 的組合，是 PTFE 無布 CCL 搭配 HC 無布 PP。近期的新一輪測試，則是以 HC 無布 CCL 替代原本的 PTFE 無布 CCL，HC 無布 PP 仍使用相同料號。 (2) 生益科技是目前 NVL576 switch tray 材料測試的領先供應商。相關材料包括 SG5300N（PTFE 無布 CCL）、SG1030N（HC 無布 CCL），以及 SIF09（HC 無布 PP）。 (3) 將 PTFE 無布 CCL 改為 HC 無布 CCL，主要是評估在改善 PCB 的製造良率與生產效率的目標下，同時滿足高頻電性要求。 (4) 為進一步優化 PCB 可製造性，後續也可能測試將 HC 無布 PP 換成 HC 有布 PP。導入 HC 有布 PP 的挑戰在於，能否仍達到訊號完整性與 0.4 dB/in 的損耗要求。 (5) 值得注意的是，SG1030N 與 SIF09 雖以 HC 為主要材料，但配方中仍含少量 PTFE。因此，這次測試並非完全去 PTFE 化，而是調整材料主體與組合，以兼顧高頻電性與 PCB 可製造性。 2. 結論： (1) PTFE 導入高階 PCB 材料（CCL 與 PP）的長期趨勢明確，但未來兩年的出貨成長節奏仍有變數。關鍵在於：NVL576 switch tray PCB 的最終材料方案、NVL576 的採用比重，以及採用正交背板的 Kyber-like 機櫃設計之研發進展。 (2) HC 在高階 CCL／PP 的應用持續擴大。短期成長動能除了 NVL576 switch tray，還包括自 4Q26 開始放量的 M9 等級材料，以及後續的 M10。 (3) 預期未來規格定案與開始量產後，生益科技將加速導入中國的 HC 供應商（如既有的東材與聖泉，潛在供應商呈和等），有助於供應缺口改善與優化成本結構。